Pseudo-noise (PN) sequence generator

This circuit uses a shift register to generate sequences of pseudorandom bits. These are of enormous practical importance in modern digital communication systems which rely on spreading the signal over a wide bandwidth (for concealing the message as well as enhancing the capacity to receive the message, if you happen to know the PN code used to scramble the message). Only certain weights (selected using the switches at the top of the schematic) guarentee so-called “maximal” sequences (i.e. sequences which do not repeat until 2N-1 clock pulses have elapsed, where N is the number of shift registers).

The list of maximal weights (which produce 255 “random” bits before repeating) for the 8 bit shift register are, in hexidecimal: 1d, 2b, 2d, 4d, 5f, 63, 65, 69, 71, 87, 8d, a9, c3, cf, e7, f5. The least significant bit corresponds to the top-most shift register in the schematic. The chip rate shown here is 931.6kHz.